An Efficient Heuristic Approach for Irregular LDPC Code Construction with Low Error

Low-Density Parity-Check (LDPC) codes are increasingly being considered as good candidates for the nextgeneration FEC codes in high throughput wireless and recording applications. Trapping sets (TSs) are known to cause error floors in regular and irregular low-density parity-check (LDPC) codes. In existing algorithm, namely the Progressive-Edge-Growth Approximate-minimum-Cycle-Set-Extrinsic-message-degree (PEG-ACSE) method that aims to avoid small elementary trapping sets (ETSs), particularly detrimental ETSs during the code construction process which lowers error floor effectively. But as the length of code increases computational complexity and Error Floor increases using this conventional method. We proposed an efficient heuristic approach which reduces error floor and computational complexity in an irregular LDPC code design process. In our proposed method parity check matrices are generated randomly and mutation operation is performed on this matrix. Corresponding Tanner graph is plotted for each matrix. Messages are transmitted over Additive White Gaussian Noise (AWGN) channel, Bit Error Rate (BER), Frame Error Rate (FER) and computational complexity is calculated through our proposed algorithm. Results from simulations show that the codes constructed using the proposed method produce lower error rates with reduced computational complexity, particularly at the high signal-to-noise (SNR) region, compared with codes constructed using other PEG-ACSE based algorithms.